This invention relates generally to semiconductor transistors, and more particularly the invention relates to laterally diffused MOS (LDMOS) transistors.
The LDMOS transistor is used in RF/microwave power amplifiers. The device is typically fabricated in an epitaxial silicon layer (P−) on a more highly doped silicon substrate (P+). A grounded source configuration is achieved by a deep P+ sinker diffusion from the source region to the P+ substrate, which is grounded. (See, for example, U.S. Pat. No. 5,869,875.)
The gate to drain feedback capacitor (CGD) of any MOSFET device must be minimized in order to maximize RF gain and minimize signal distortion. The gate to drain feedback capacitance is critical since it is effectively multiplied by the voltage gain of the device.
Heretofore, the use of a Faraday shield made of metal or polysilicon formed over the gate structure has been proposed as disclosed in U.S. Pat. No. 5,252,848. (See, also U.S. Pat. No. 6,215,152 for MOSFET HAVING SELF-ALIGNED GATE AND BURIED SHIELD AND METHOD OF MAKING SAME.)
It would be advantageous to connect the gate shield to RF ground to further reduce RF signal feedback from the drain to the gate and source.
The source contact and gate shield are ohmically connected, and this connection is readily implemented by extending the source contact metal over the gate structure and, in effect, becoming the gate shield. However, this structure has high drain to source and shield capacitance.